BitDense: Dense Bit-Slice Architecture with Dynamic-Sized Group Quantization for Precision Scalable Low-Bit AI Inference
IEEE/ACM International Symposium on Microarchitecture, 2026 * equal contribution
School of Electrical Engineering and Computer Science, GIST
SYMPLE Lab explores next-generation AI system design across the full stack, from algorithms to architectures to silicon. We develop memory-centric and precision-adaptive computing techniques for efficient large-scale AI, targeting emerging generative AI workloads including large language and diffusion models. By co-optimizing models and hardware, we bring powerful AI from the cloud closer to everyday devices.
One stack, designed together
We optimize algorithms, architectures and circuits jointly instead of one layer at a time.
- Algorithm
Hardware-aware algorithm optimization
Lightweight AI algorithms designed around real hardware constraints.
- HPCA 2026 GyRot
- JETCAS 2025 LightRot
- MICRO 2026 BitDense
- Architecture
Memory-centric AI system design
AI systems built around next-generation memory.
- DAC 2026 SliceMoE
- ISCA 2026 SingularBit
- ISSCC 2026 SMoLPU
- Chip
AI accelerator SoC and chip design
Low-power, high-efficiency AI silicon for on-device platforms.
- ISSCC 2026 Revolver
- ISSCC 2025 EdgeDiff
- ISSCC 2026 SMoLPU
Recent publications
All 86 publicationsSR-VLNA: A 5.0-23.9 mJ/meter Spatial Reasoning-based Vision Language Navigation Accelerator for Embodied Agents
IEEE Symposium on VLSI Technology and Circuits, 2026
SingularBit: Exploiting Synergy of Singular Value Decomposition and Low-Bit Quantization for Weight and KV Compression in LLM Inference
IEEE International Symposium on Computer Architecture, 2026
An Energy-Efficient LLM Processor for Mobile Devices with Pipelined NPU-CIM
IEEE Symposium in Low-Power and High-Speed Chips, 2026
SliceMoE: Bit-Sliced Expert Caching under Miss-Rate Constraints for Efficient MoE Inference
ACM/IEEE Design Automation Conference, 2026
Funded projects
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Oct. 2026 – Sep. 2029
OSCAR: Open-Source AI-Driven PA-DPD with Computing-in-Memory Acceleration for Energy-Efficient 6G FR3 Wideband Transmitters
6G FR3 광대역 고효율 송신기를 위한 AI 기반 PA-DPD 및 Computing-In-Memory 연산 가속 회로 통합 설계
한국연구재단 한-핀란드 공동연구사업
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Jul. 2026 – Dec. 2030
MOSAIC: Multimodal On-device Sensory AI Computing
멀티모달 센서-NPU 통합 피지컬 AI 반도체 연구단
InnoCORE 출연연 연계형 연구과제
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Mar. 2026 – Dec. 2028
PIM Semiconductor Design Research Center
PIM 반도체 설계연구센터
과학기술정보통신부 PIM 인공지능 반도체 핵심기술개발
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Mar. 2026 – Feb. 2031
NPU–SoC and LPDDR–PIM Architecture for On-Device AI Agents and Test-Time Scaling with Multi-Fidelity LLMs
온디바이스 AI 에이전트와 테스트–타임 스케일링을 위한 멀티 피델리티 LLM 기반 NPU–SoC 및 LPDDR–PIM 아키텍처
한국연구재단 세종과학펠로우십
Collaborators and supporters
We are looking for students who want to build AI chips.
학부 연구생, 석사·박사과정 지원자를 모집합니다. 전공보다 동기와 문제를 끝까지 파고드는 태도를 더 중요하게 봅니다.