Sangjin Kim 김상진
Assistant Professor, School of EECS, GIST
- OfficeEECS C508, GIST, 123 Cheomdangwagi-ro, Buk-gu, Gwangju 61005, Republic of Korea
- Emailsangjinkim@gist.ac.kr
- Phone062-715-2267
Biography
Sangjin Kim is an Assistant Professor with the School of Electrical Engineering and Computer Science (EECS), Gwangju Institute of Science and Technology (GIST), Gwangju, South Korea.
He received the B.S., M.S., and Ph.D. degrees in electrical engineering from KAIST, Daejeon, South Korea, in 2019, 2021, and 2024, respectively. From 2024 to 2026, he was a Post-Doctoral Associate with KAIST.
His research focuses on AI accelerator chip design, memory-centric computing architectures, and algorithm–hardware co-design for efficient on-device generative AI systems.
Experience
- Mar. 2026 – present
- Assistant Professor, EECS, GIST
- Mar. 2024 – Feb. 2026
- Post-doctoral Researcher, AI-PIM, KAIST
Education
- Feb. 2024
- Ph.D., School of Electrical Engineering, KAIST
- Feb. 2021
- M.S., School of Electrical Engineering, KAIST
- Feb. 2019
- B.S., School of Electrical Engineering, KAIST
- Feb. 2014
- Gwangju Science High School
Awards
- Dec. 2023
- KAIST Institutes Outstanding Researcher Award
- May 2023
- Best Paper Award, IEEE ISCAS (co-authored)
- Feb. 2023
- Circuit Design Silver Prize, 29th Samsung Humantech Paper Award
- Feb. 2023
- Circuit Design Bronze Prize, 29th Samsung Humantech Paper Award (co-authored)
- Apr. 2022
- Chip Design Contest Best Poster Award, 29th Korean Conference on Semiconductors
- Apr. 2022
- Outstanding Student Paper, IEEE CICC (co-authored)
- May 2021
- Best Paper Award, IEEE CAS Society Neural Systems and Applications Technical Committee (co-authored)
- Nov. 2020
- Best Design Award, A-SSCC Student Design Contest (co-authored)
Invited talks
- Feb. 2025
- Diffusion Model Accelerator Design for Few-step Inference and Multi-modal Conditioning with Mixed-Precision and Reordered Group-Quantization Google, San Diego, CA
- Feb. 2025
- Hardware Microarchitecture Optimization for Quantized Lightweight Model: Multi-Modal Few-Step Diffusion Model Accelerator Neuralink, Fremont, CA
- Feb. 2025
- Design of Diffusion Model Accelerator with Mixed-Precision and Reordered Group-Quantization Apple, Cupertino, CA
- Dec. 2024
- Recent Trend and Challenges of DRAM-based CIM/PIM Samsung Technology Conference, Daejeon
- Aug. 2024
- Opportunities and Challenges of DRAM-based Computing-in-Memory for AI Accelerator ISOCC 2024, Sapporo
- Oct. 2023
- Dynaplasia: Analog-based DRAM-PIM Semiconductor KCIA, Seoul
- May 2023
- AI-PIM Semiconductor Overview and Trends IITP, Daejeon
- Feb. 2023
- DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching Apple, Cupertino, CA
Reviewer
- IEEE Journal of Solid-State Circuits (JSSC)
- IEEE Transactions on Circuits and Systems I & II
- IEEE Transactions on Circuits and Systems for Video Technology
- IEEE Transactions on VLSI Systems
- IEEE Micro
- Proceedings of the IEEE
- IEEE ISCAS
- IEEE AICAS